#A1000 1M Agnus Project
10 messages in this thread
Count both myself and a friend in for one. BTW, something I'd appreciate if
you'd keep in mind, there are alot of us out here who did the Amazing Computing
512K upgrade along with Dave Haynie's autoconfig mod, so we already have 1 meg
A1000's. I realize this conflicts with your design, but it would be nice if you
could maybe tell us how to back out gracefully from this mod so it won't
conflict with yours. Good Luck.
Greg
Well, I have no problem with the extra RAM, but the autoconfig stuff might have
to be changed. I'd need details on it to decide if it'd be compatible.
-Greg
Did you ever get a feeling like you'd found some people dying of thirst in the
desert and asked, "Would anyone like a drink?" <grin>
D'you think there's enough interest in your project to make it fly?
Pete
I am going to do it just because CBM hasn't. I am 95% of the way to a PCB
design. I feel CBM's stance on the A1000 upgrade is not purely from a technical
standpoint. They have a vested interest in seeing A1000 owners upgrade (at
their own cost) to the newer machines.
The cost of the board will only be slightly less than an A500, unless I can
work out a deal with CBM (or a number of local dealers to acquire a quantity of
chips). Only when you consider the board as a 1 Megabyte Ram expansion and a
ROM upgrade with the A500 style clock can you consider it economically.
A number of people consider upgrading to the A500 a downgrade and would be
hard-headed enough to buy it. Even so, I've had two offers from different
sources to bankroll me even after explaining the production costs. I personally
am not in it to make money. Worst come to worst, I'll sell the socketed PCB for
about half the cost of the version that I supply the chips and let the user buy
them.
Now if Ben Blish ever comes out with a 4 layer version of Board Master I'd
release a 2 Megabyte 25Mhz 68030 design (which I have already crudely
prototyped) manufacturers ($1200 for the 2Mbyte version). 🙂
-Greg
I have it running. Guess I'll have to let you test it, eh?
–Ben–
Sure would speed up my development time. 🙂
-Greg
Add one more to your list.
The proposed $1200 25 Mhz 030 board with 2 Meg sounds GREAT. I hope it is a
high performance design with 64K cache. Main memory accessed in nibble mode
(like the GVP 030 and Next computer), getting very few wait states even when
stuffed with slower (cheaper) ram chips.
Commodore made a limited time low cost offer to 1000 owners for upgrades to
2000. This was more generous than any other computer company i've heard of.
Did Apple offered a low cost upgrade to MacII, IBM to MCA machines ?
Dan,
I got my 2000 on the CBM upgrade offer. Much as I hate to admit it, IBM did
offer an upgrade to MCA machines. It amounted to "bring us your old, tired PCs
and XTs and some bucks, and we'll give you an old, tired PS/2."
Kinda like their old typewriter upgrade deals.
Rick Stevens/MicroBotics
My 030 design would use 80 nsec static column DRAM, which would act like a 8K
cache. GVP's Nibble mode operation with burst mode means you are only running
three bus cycles fast, one normal. And all non-cached bus cycles would have
waitstates.
Did you know that burst mode can use waitstates also? The fastest the 030 can
go in burst mode is 2-1-1-1 (Two clocks for the first long word and 1 clock per
each burst access). GVP needs to be nailed down on exactly what their timings
are. At 25Mhz, in burst mode, you have 40 nsec to get each longword. Most, if
not all DRAM are speced at 45 nsec tCAC (column access time). So, I seriously
doubt that GVP is doing 2-1-1-1 or even 3-1-1-1 bursts.
My design runs at a steady 2-2-2-2, which is the same as if there was no burst
mode and thus, it isn't needed. As long as a task stays within the 8K boundary
(interleaved 32bit page) there are no wait states until the next refresh
interval occurs (or the processor jumps out of the page).
So you can say a wait state is not a wait state is not a wait state. Of course
the same gimmictry exists in '386land with everyonJY