CompuServe Messages

Commodore Liquidation

    03-May-94 07:17:52
Fm: Harry Manolopoulos 75410,322
To: Andrew Carol 71350,3646
The microcode is usually onthe same chip as the cpu so it should be faster to execute instructions from the microcode in a cisc than go out to memory in a risc. It may be (speculation here) that ROM technology is part of the bottleneck. My main point is that since risc trades microcode for external software and a smaller instruction set that the external software is LARGER in code size, load time from disk, etc. A risc and cisc with equivalent instruction execution times (not clock speed) when running similar code should have the cisc outpreform the risc. By code I mean: 1. Code that uses a variety of the cisc instruction set that is not present in the risc instruction set that the risc has to emulate through code. 2. Code that is larger than any internal and external instruction cache. It is interesting to see that some cpu's are now faster at executing floating point in software than by using their companion co-processors. I am not a cisc vs risc (pro cisc) zealot, but see usefulness in combining both methods in processor design. I don't like having to remember a bazillion instructions for a cisc, yet don't want to write lots of extra code for a risc that I could of had in a cisc. I vageuly remember reading somewhere that the cisc instruction sets were chosen after looking at real world code and finding the most commonly used instructions. For some nostalgia, coding a PDP-8 was risc-like and I remember DEC's Writable Control Store (roll your own instruction set). Harry M.