#Rumor Update
03-Jun-94 00:28:21
Sb: #150201-#Rumor Update
Fm: Black Belt Systems 76004,1771
To: Dale Larson 76702,654
No, it's not false at all. It can be done, and it can be done _easily_. If
you think otherwise, you're quite wrong.
The speed of the chips in situ is due to the incoming clock. A faster chip
coul dbe made (again, _easily_) at the current rates by continuing to
clock it slowly.
8520's are _nothing_ with regard to complexity – if CBM didn't doc them,
well, there you go, eh? That's certainly a problem, but not one that is
killer. There _are_ docs for older chips that are ___extremely___ similar
(MOS 6522 VIA's come to mind immediately… similar right down to the
bizzarre way the flags are handled and the wacko timers work – and they're
very well doc'ed, too) and I wouldn't be the least surprised if a lot of
the "missing" info would be found right in other chip docs. I can't say
that "using C= internal resources" fills me with a vision of incredible
power turned on a problem. Quite the contrary. I see no reason at all why
this would be a hard task, simply given the $$$ to use the proper
resources to get it done.
–Ben
…via AutoPilot