Memory Expansion
25-Jun-86 01:33:35
Sb: #24064-Memory Expansion
Fm: FRANK SCHWAB 73137,3142
To: scott drysdale 72127,1510
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Probably because the RMW cycle has the 68K on the bus for an undivided 8
clock cycles, instead of the expected (normal) 4 clock cycles. If there is
an interleaving of the Chip DMA cycles and the 68K R/W cycles, then the 68K
may have just taken a memory cycle allocated to someone else. Just guessing.
/frank