CompuServe Thread

Bela … Right you are on the 68020, but you *can* just "drop in" a 68010 if you have V1.1 s/w according to Bob P. at CBM (opening the Amiga case voids your warranty though). The CSA '020 board is $1480 (quantity of ONE); $1985 with the 256K. I dunno about *triple* though … this from Louis Mamakos on USENET just today (he visited CSA and ran a few benchmarks while there): These are 3 Dhrystone runs with (1) 32-bit integers without register variables; (2) 32-bit integers with register variables; and (3) 16-bit integers with register variables. The three Amiga configurations tested were (A) standard Amiga; (B) CSA '020 board with the '020's cache enabled; and (C) CSA '020 board with cache enabled *and* the extra 256K RAM enabled. Std Amiga 68020 w/cache 68020 w/cache and RAM 32-bit/no reg 458 515 781 32-bit/reg 458 515 657 (??) 16-bit/reg 549 588 781 Louis hypothosized about the anomoly: "it is possible that the data may not have gathered with the 68020 instruction cache enabled." The main point though is that Amy is in dire need of a good (well-optimized) C compiler. The Std Amiga numbers are nearly identical with the Dhrystone numbers provided by Dale Luck (of CBM) for native Lattice C. Dale also reported 850 Dhrystones for the same source-code cross-compiled on a Sun with the Greenhills C compiler (850 is in the same ballpark as the ST runs). Then, if the compiler were optimized for the 68020 chip, we might see performance of around 2.5 times the Std Amiga (at 7.1+ MHz). Finally, CSA is reportedly working on a 14.3 MHz version of their board, and will market it as "Turbo Amiga". Who needs a Sun ….. /kim P.S. For more information on Dhrystone's, see my upload DHRYSTON.DOC in DL7 of PCS-155. * Reply: 2317