I have downloaded both ACCEL.LZH and 14MHZ.LZH from Lib #12. Both of these
are DOCs for building a 14 MHz accelerator for the 68000. Both of these use
a flip-flop to halve the 28 MHz clock. Also, in both cases, it seems that
the flip-flop is not initialized, and therefore comes up in an unknown
state. Does anyone know what the phase relationship should be between the
new 14MHz clock and the system 7MHz clock? There must be some recommended
relationship.
Thanks for any help!
-Bill.